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~6 min read · 1,333 words ·updated 2026-04-28 · confidence 73%

Marvell Technology Product Portfolio

Updated: 2026-04-28
Status: ✓ Verified via SEC filings, investor releases, and analyst sources

Overview

Marvell Technology (NASDAQ: MRVL, CIK 0001835632) operates across five primary product groups serving hyperscale data centers, cloud providers, and telecommunications infrastructure. The company transitioned from legacy storage-controller manufacturer to the “nervous system of AI” infrastructure, with data center revenue exceeding $6 billion (75% of total FY2026 revenue) as of fiscal year 2026 ended 2026-01-31.

1. Custom AI Silicon (xPU / ASIC)

Revenue (FY2026): $1.5 billion ($2.5B+ projected FY2027) ✓
Competitive Position: Second globally after Broadcom (which holds ~70% custom AI accelerator market in 2026) ◐

Technology Partnerships & Design Model

Marvell operates a “design partnership” model with hyperscaler cloud providers, co-engineering custom silicon:

  • Amazon AWS Trainium: Trainium 2 in production; Trainium 3 ramping 2026; Trainium 4 in development. Marvell has secured 3nm wafer and advanced CoWoS packaging capacity for next-generation silicon. ✓
  • Microsoft Maia: Custom AI accelerator architecture in development with integration of Marvell silicon and co-packaged optics (CPO). ✓
  • Google TPU work: Rumored partnerships under negotiation; unconfirmed. ⚠

Co-Packaged Optics (CPO) Integration

On 2026-01-06, Marvell announced breakthrough CPO architecture for custom XPUs. The Marvell 3D SiPho Engine integrates compute silicon, HBM, and chiplets on a single substrate with optical I/O at 200 Gbps electrical and optical interfaces. This eliminates electrical copper paths between XPUs across racks, enabling 100x longer distances and lower latency. CPO is expected to reach $500M annualized run rate by Q4 FY2028. ✓

Financial Trajectory

  • FY2026 actual: $1.5B
  • Management guidance FY2027: 20% growth (conservative)
  • Morgan Stanley forecast FY2027: 100% growth
  • FY2027 target: $2.5B+
  • Market opportunity: Analysts project $2–3B+ annually by 2027 as AWS and Microsoft scale custom silicon deployments. ◐

2. Optical & Electrical Interconnect

Revenue (FY2026): Embedded in Data Center $6B+ segment; breakout expected to exceed 50% YoY growth in FY2027 ◐
Competitive Position: #1 globally for PAM4 DSPs; #2 for coherent DSPs (behind Broadcom) ✓

Product Categories

A. PAM4 Optical DSPs (Pluggable, AEC, Co-Packaged)

Current Shipping (2026):

  • Ara platform (3nm, 2024): 1.6T PAM4, 200 Gbps/lane serial interfaces. Ara X, Ara T, Petra, Aquila M variants sampling Q1 2026 for use-case optimization. ✓
  • Alaska A (AEC, 1.6T): Available now for co-packaged optical applications. ✓
  • Spica Gen2 (800G): Legacy high-volume 5nm platform. ✓

Roadmap:

  • 1.6T DSPs: Volume production now; demand has exceeded supply. Barclays projects optical ports will double in 2026 and again in 2027, implying ~90% optical revenue growth per year. ✓
  • 3.2T DSPs: Sampling 2026–27 (enabled by Polariton POH modulators post-acquisition). ◐

Architecture: Marvell supports both pluggable optics (QSFPdd, OSFP) and co-packaged optics (CPO) roadmaps, with CPO gaining traction in custom AI accelerators. ✓

B. Coherent DSPs (for DCI / ZR Optics)

Current:

  • Orion DSP (5nm): 800G ZR/ZR+ standard. COLORZ 800G coherent pluggables shipping. ✓
  • Demonstrations: Marvell + Juniper + Coherent Corp. demonstrated industry-first 800ZR system at OFC 2024. ✓

Roadmap:

  • 1.6T coherent DSP (Electra/Libra): Expected to begin sampling H2 2026. ◐
  • Market adoption: 800G coherent modules expected to see ~500,000 units annually by 2028 (Cignal AI forecast). ◐

C. Passive & Active Silicon Photonics

Retimers & Gearboxes:
Marvell offers serializer/deserializer (SerDes) IP, long-reach retimers, and protocol converters (112 Gbps XSR, PCIe Gen 6, CXL 3.0) on 5nm/3nm TSMC. ✓

Field Maturity:
Marvell silicon photonics devices have logged >10 billion field hours globally. ✓

D. Polariton Acquisition & Plasmonic-Organic-Hybrid (POH) Modulators

Announced: 2026-04-22
Rationale: Polariton’s POH modulator technology extends Marvell’s optical roadmap toward 3.2T and beyond. POH combines plasmonic metal slot waveguides with electro-optic (EO) polymers, achieving:

  • Sub-20 µm² footprint (vs. 100+ µm² traditional silicon photonics)

  • 110 GHz EO bandwidth (record 1.0 THz demonstrated by ETH Zurich/Polariton in 2025)

  • 40 Vµm voltage-length product (ultra-low driving voltage)
  • Multi-Tb/s demonstrated ✓

Integration: Post-close, Polariton becomes Marvell’s proprietary modulator source for 1.6T and 3.2T DSP-based transceivers. Polariton’s existing EO-polymer supply partnerships continue (material supplier names TBD pending deal close). ✓

3. Networking & Switching (Innovium Legacy)

Revenue (FY2026): Part of Data Center $6B segment; sub-segment growth modest vs. optical ◐
Competitive Position: #2 globally; #1 for hyperscale AI fabrics (specific wins over Broadcom Tomahawk in early 2020s) ✓

Teralynx Family

Teralynx 7:

  • Introduced 2017 (pre-Marvell acquisition of Innovium, 2020).
  • Shipped >5M 400G ports to major hyperscaler.
  • Architecture: 12.8 Tbps aggregate throughput across SKUs; multi-tier deployment.

Teralynx 10 (Current):

  • Announcement: 2024-07-25 volume production achieved. ✓
  • Specs: 51.2 Tbps, 64 × 800 GbE ports, 5nm TSMC, homegrown 112 Gbps PAM4 SerDes.
  • Features: Industry’s lowest latency, deterministic behavior, support for training, inference, and general-purpose compute.
  • Customer wins: Google, Meta, Amazon (reported); specific deals TBD pending Q2 2026 disclosures. ◐

Teralynx 102.4T (Future):

  • Sampling: H1 2026 (expected imminently). ◐
  • Architecture: Equivalent to Broadcom Tomahawk5, Nvidia Spectrum-X, Cisco Silicon One equivalents. ◐

4. Storage (Legacy / Cash Flow Generator)

Revenue (FY2026): <$500M (estimated) ⚠
Competitive Position: Mature / declining ◐

Product Portfolio

  • HDD Controllers: Shipped 5 billionth unit historically; legacy revenue source. Stable, high-margin cash generation.
  • SSD Controllers (SATA/NVMe): Marvell 88SE14xx SATA-to-SATA converters; 88NR2241 NVMe accelerator for enterprise reliability. Still active for cloud archival and edge compute.

Strategic Role: Declining business; funds R&D for AI silicon and optical. Management de-emphasizes; revenue <1% of data center group as of 2026.

5. Carrier Infrastructure (OCTEON DPU / Network Processors)

Revenue (FY2026): Estimated $200–400M sub-segment ⚠
Competitive Position: Niche leader in 5G RAN and wireline; competing vs. Nvidia, Intel, Broadcom in SmartNIC/DPU space ◐

OCTEON DPU / Network Processor Family

OCTEON 10 Lineup (5nm TSMC, 2023–2024):

  • CN102 / CN103: Data/control-plane processors. 24 × Arm Neoverse N2 cores; AI/ML acceleration. Target: routers, firewalls, 5G small cells, SD-WAN, top-of-rack (ToR) switch controllers.
  • CN106: Cloud/enterprise/5G baseband. Multi-purpose packet processing, machine-learning inference.
  • OCTEON 10 Fusion: Integrated 5G baseband (L1 acceleration, Layer 1 functions). Ultra-low latency for open RAN and virtualized RAN (vRAN).

Applications:

  • 5G wireless infrastructure (base stations, centralized RAN controllers)
  • Wireline carrier networks (routers, firewalls, DPI security appliances)
  • Cloud SmartNICs / DPUs for server I/O acceleration
  • Automotive Ethernet (future roadmap, details TBD)

Competition: Nvidia BlueField DPU, Intel Mount Evans, Broadcom equivalents. Marvell differentiates on 5G integration (OCTEON Fusion) and cost.

Segment Revenue & Growth Rates (FY2026)

SegmentFY2026 RevenueYoY GrowthKey Driver
Data Center (total)$6.0B++46%Custom silicon, optical, switching
├─ Custom AI Silicon$1.5B~40%AWS Trainium ramp
├─ Interconnect (optical + switching)$3.0B+~50%1.6T DSP volume + Teralynx wins
├─ Storage + Other$1.5B-5%Legacy decline offset by mix shift
Non-Data Center$2.2B+20%OCTEON, automotive, other
Total Company$8.2B+42%AI infrastructure acceleration

FY2027 Guidance: Marvell projects ~$9.4B–11B revenue, with 50% growth in interconnect segment and 100% growth in custom silicon (Morgan Stanley consensus). ◐

Key Differentiators vs. Competitors

  1. Custom AI Silicon: Design partnerships with AWS (Trainium) and Microsoft (Maia) = fastest path to production for hyperscalers.
  2. Vertically Integrated Optical: Own DSP + modulator IP (post-Polariton) → faster iteration on 1.6T/3.2T roadmap.
  3. CPO Architecture: Early adoption of co-packaged optics eliminates copper I/O bottleneck for XPUs (vs. pluggable-only competitors).
  4. Switching (Teralynx): Deterministic, low-latency architecture favored by hyperscalers over legacy Tomahawk designs.

Sources

Cross-references