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~9 min read · 2,020 words ·updated 2026-04-29 · confidence 78%

Marvell Papers and Conference Footprint

Updated: 2026-04-29 Status: ✓ / ◐ — Conference programs and Marvell investor pages verified; some paper-level attributions partial Cross-references: platform_overview.md · optical_interconnect_roadmap.md · conference_calendar.md · management_interviews.md

Executive Summary

Unlike Broadcom (which historically minimizes peer-reviewed publication) and Nvidia (which publishes prolifically through GTC and academic venues), Marvell occupies an intermediate position — peer-reviewed papers concentrated at OFC and ECOC for the optical / DSP groups, Hot Chips for switch and DPU silicon, and CICC/ISSCC for analog/SerDes IP. The richest channel for analyst-grade insight remains the company’s own Industry Analyst Day decks (annual, April; Mar 2025 and prior published as PDFs at marvell.com), the Custom AI Investor Event (Jun 17 2025), and OFC / ECOC plenary or workshop talks delivered by senior fellows. This file catalogs the visible 2023–2026 corpus.

1. Industry Analyst Day and Investor Events

1.1 Marvell Industry Analyst Day 2023 (June 2023, Santa Clara)

Format: In-person, invite-only analyst event with dinner and tech demos. Matt Murphy attended; no publicly published deck. ◐ Coverage: Futurum Group recap, “Marvell Industry Analyst Event.” ◐ URL: https://futurumgroup.com/insights/marvell-industry-analyst-event/

1.2 Marvell Accelerated Infrastructure for the AI Era (Apr 2024)

Format: Live event + published deck. Deck: “Marvell Accelerated Infrastructure for the AI Era.” ✓ URL: https://www.marvell.com/content/dam/marvell/en/company/assets/marvell-accelerated-infrastructure-for-the-ai-era-event.pdf Themes: First public framing of the $75B 2028 data-center TAM, custom xPU pipeline, optical roadmap to 1.6T, CPO breakthrough preview. Coverage: Moor Insights & Strategy / Six Five “Marvell Accelerated Infrastructure for the AI Era Event.” ✓ URL: https://moorinsightsstrategy.com/the-six-five/marvell-accelerated-infrastructure-for-the-ai-era-event/

1.3 Custom AI Investor Event (Jun 17 2025, virtual)

Format: Webcast + slide deck. Originally scheduled as Investor Day; restructured to Custom-AI-only webinar. Deck: “Custom AI Investor Event.” ✓ URL: https://www.marvell.com/content/dam/marvell/en/company/assets/marvell-custom-ai-investor-event-2025.pdf Replay video: ✓ https://videos.marvell.com/watch/Ra6XrUHULNtk1nredHEPnJ Key reveals:

  • Data-center TAM raised to $94B by CY2028 (from $75B prior). ✓
  • Custom accelerated compute TAM $55.4B = $40.8B custom xPU + $14.6B xPU-attach. ✓
  • 18 cloud-provider design wins disclosed. ✓
  • AWS Trainium, Microsoft Maia, Meta DPU multi-billion-dollar programs confirmed. ◐ Coverage: “Marvell Custom AI Event: Wall Street Takeaways,” Yahoo Finance. ✓ URL: https://finance.yahoo.com/news/marvell-custom-ai-event-wall-095217024.html

1.4 Marvell Industry Analyst Day 2025 (Apr 2025, Silicon Valley)

Format: Multi-day analyst event. vFairs platform. Hub: https://marvellindustryanalystday.vfairs.com/ ✓ Coverage:

1.5 Marvell Industry Analyst Day 2026 — TBD

Status: Not publicly scheduled as of 2026-04-29. ⚠ Historic cadence is April; absence of an April 2026 event coincides with the Polariton announcement (Apr 22) and the OFC 2026 cycle. A summer 2026 event is plausible but not confirmed. Check https://investor.marvell.com/news-events/ir-calendar.

1.6 Quarterly earnings calls (FY26 cycle)

QuarterDateNotable disclosure
Q1 FY262025-05-29Custom AI silicon programs ramping; first hint of Photonic Fabric direction. ◐
Q2 FY262025-08-28Revenue $2.006B (+58% YoY); data-center 74% of total. ✓
Q3 FY262025-12-02Celestial AI acquisition announced same day; reports of customer concerns dismissed. ✓
Q4 FY262026-03-05FY26 revenue $8.2B (+42%); 50% optical growth guided FY27; Polariton not yet known. ✓

Source: Marvell IR press releases at https://investor.marvell.com/news-events/press-releases. ✓

2. OFC (Optical Fiber Communications Conference)

OFC is the most important venue for Marvell’s optical / DSP / silicon-photonics technical disclosures.

2.1 OFC 2024 (San Diego, March 24–28 2024)

Marvell highlights:

2.2 OFC 2025 (San Francisco, March 30 – April 3 2025)

Marvell announcements:

2.3 ECOC 2025 (Copenhagen, Sep 28 – Oct 2 2025)

Booth: C4134. Confirmed presentations:

Date / timeTitleSpeaker
Mon Sep 29, 12:00–12:30”800G Coherent DSP and Beyond”Bo Zhang, Senior Principal Engineer ✓
(during ECOC)“Outlook for Coherent Lite Technologies and Markets”Marvell speaker (TBD per public listing) ◐
(during ECOC)“Revolutionizing Rack-scale Connectivity Using Co-packaged Copper & Optics”Marvell speaker ◐
(during ECOC)“Impact of Equalizer-Enhanced Phase Noise for Coherent Pluggables”Marvell speaker ◐

Sources:

2.4 OFC 2026 (Los Angeles, March 15–19 2026)

Booth: #1600. Marvell described its presence as “more than 20 demos” + an ecosystem of 80+ partner demos powered by Marvell silicon. ✓

Confirmed Marvell-authored / -keynoted sessions:

Date / timeSessionSpeaker / role
Mon Mar 16, 10:50–12:00”Scale Out Data Center Networks” (Optica Executive Forum)Radha Nagarajan, SVP & CTO Optical Engineering ✓
Mon Mar 16, 15:30–16:40”Scale Up Data Center Networks” (Optica Executive Forum)Dave Lazovsky, EVP & GM Data Center Networking (Celestial AI lineage) ✓
Tue Mar 17, 16:30–18:30”Symposia on Next Generation Interconnects for AI Scale Up Systems”Multiple Marvell contributors ◐
Tue Mar 17, 18:50–19:10”Building Optical Scale-up Networks for Next-generation AI”Marvell speaker ◐

Sources:

2.5 OFC 2026 collateral product announcements

3. Hot Chips (DPU / xPU / switch silicon disclosures)

Hot Chips is the venue where Marvell historically publishes architecture-level details on switch and DPU silicon.

YearTopicNotes
Hot Chips 33 (2021)Innovium Teralynx 7 architecture (pre-Marvell-acquired program)Predates Marvell ownership; foundational for Teralynx 10 ◐
Hot Chips 34 (2022)OCTEON 10 architecture previewCavium-lineage organization ◐
Hot Chips 35 (2023)OCTEON 10 details + Teralynx 10 disclosureConfirmed via WikiChip and ServeTheHome coverage ✓
Hot Chips 36 (2024)Teralynx 10 51.2T deep-dive (post-volume-production)Specific session presence ◐ — coverage at ServeTheHome
Hot Chips 37 (2025)Custom AI silicon architectural family talkNot separately confirmed; Marvell traditionally avoids customer-specific disclosures at Hot Chips ⚠
Hot Chips 38 (Aug 2026, anticipated)Likely OCTEON CN20K and Photonic Fabric architectureInferred, not confirmed ⚠

Sources used (partial):

Caveat: Marvell does not publish a comprehensive index of its Hot Chips slots; gaps in this table reflect search-coverage limits, not necessarily absence. ⚠

4. CICC / ISSCC / VLSI (analog and SerDes IP)

Inphi-lineage analog engineers (Marlborough MA, Santa Clara) historically publish at CICC (Custom Integrated Circuits Conference) and ISSCC (International Solid-State Circuits Conference) on:

  • 112 Gbps and 224 Gbps PAM4 SerDes designs
  • Coherent DSP architectures
  • TIA / driver designs for silicon photonics

Specific paper IDs are searchable via IEEE Xplore using author affiliation “Marvell Semiconductor” or “Inphi Corporation” (pre-2021). ◐ Comprehensive paper-level attribution is a known content gap and is left as a future deepening exercise; the corpus includes ~5–10 papers per year through this period. ⚠

5. COMPUTEX 2026 Keynote (Matt Murphy)

Date: June 2 2026 at 10:30 a.m., Taipei Nangang Exhibition Center Hall 2, 7F. ✓ Title: “Scaling Data Center Infrastructure to Drive AI Innovation” Sources:

Significance: This is Marvell’s first major COMPUTEX keynote slot, signaling the company’s bid to be regarded as a peer of Nvidia / AMD / Intel in AI infrastructure narrative — not just a silicon supplier. ◐

6. Other Conference Presence (2024–2026)

ConferenceMarvell roleNotes
MWC Barcelona (annual, Feb-Mar)OCTEON Fusion 5G, networking demos◐
DesignCon (annual, Jan/Feb, Santa Clara)SerDes / signal integrity sessions, technical papers✓ pattern observed across multiple years
SuperComputing (SC, Nov)Networking and DPU demos◐
AWS re:Invent (Dec)Trainium-related joint promotion◐
Microsoft Ignite (Nov)Maia-related joint promotion◐
Google Cloud Next (Apr)Axion Arm CPU joint promotion◐
NVIDIA GTC (Mar)NVLink Fusion partnership; expected presence at GTC 2026✓ (GTC 2026 was March 16–20 in San Jose)

7. Synthesis: Where Marvell Publishes vs. Where It Stays Silent

Heavy publishing: OFC, ECOC, Hot Chips, ISSCC/CICC for SerDes IP. Marvell uses these venues to legitimize technical leadership claims (especially for 1.6T DSP, coherent, and 224 Gbps SerDes).

Light publishing: Custom-xPU specifics. Marvell follows the merchant-design-services convention of not naming customers or disclosing specific architecture details; AWS Trainium, Microsoft Maia, etc. design-win commentary is restricted to investor communications.

Investor channel emphasis: Industry Analyst Days, Custom AI Investor Event, quarterly earnings calls, and the Six Five / Stratechery / 650 Group podcast circuit (see management_interviews.md) carry the narrative for forward roadmap.

Implication for analysts: Forward-looking custom-silicon and Photonic-Fabric data is most reliably found in the IR materials and analyst-day decks; OFC / ECOC are the right venues for trailing technical proof points (DSP architecture, modulator measurements, light-engine power/efficiency).

Sources (consolidated)

Cross-references