Skip to content
MRVL
~8 min read · 1,908 words ·updated 2026-04-28 · confidence 63%

Hyperscaler Custom Silicon Disclosures: Counter-Party Perspective

Summary Table: Marvell Mention & Confidence

HyperscalerConfirmed DisclosureHedged / ImpliedAbsence of DisclosureOverall Confidence
Amazon (AMZN)✓ AWS-Marvell 5-yr contract (Dec 2024)Re:Invent keynotes emphasize “AWS silicon partnership” genericallyNo named supplier in 10-K risk factors reviewed✓ High (contractual)
Microsoft (MSFT)◐ Maia 200 on TSMC 3nm (disclosed)“Custom-built silicon and strong partnerships” language vague on design partnerNo Marvell name in public Maia announcements; TSMC confirmed as fab only◐ Medium (TSMC named, Marvell inference)
Google (GOOGL)✓ Marvell as 3rd TPU design partner (April 2026)TPU v8 split: Broadcom (training), MediaTek (inference), Marvell (MPU + new inference TPU)Historical absence: Marvell not mentioned in TPU gen 1-7 disclosures✓ High (confirmed April 2026)
Meta (META)✓ Marvell design collaboration for Arke MTIA (2024)OCP 2025: ESUN working group lists Marvell; Meta CPO partnerships generic on DSP sourcingNo Meta 10-K mention of Marvell by name (OCP is open standard, not contractual)◐ Medium (OCP co-design, not exclusive)
Oracle (ORCL)⚠ None foundOCI Gen2 lists Nvidia/AMD GPUs but no switch/interconnect supplier namedNo disclosed partnership; 2022 security-only collaboration pre-dates OCI Gen2 capex surge⚠ Low (absence)

1. Amazon Web Services (AMZN)

Confirmed Marvell Partnership

AWS-Marvell Five-Year Strategic Agreement (December 2024)

AWS formalized a multi-year custom silicon relationship with Marvell Technology in December 2024. The agreement covers:

  • Custom AI accelerators (Trainium lineage)
  • Optical DSPs and DCI optical modules
  • Ethernet switching silicon
  • Data center interconnect components

Primary Source: Amazon-Marvell partnership coverage

Trainium3 Launch & Revenue Ramp (December 2025)

CEO Matt Garman at AWS re:Invent 2025:

  • Announced Trainium3, AWS’s first 3nm AI chip (TSMC manufacturing)
  • Delivered 4.4x more compute, 5x more AI tokens per megawatt vs. Trainium2
  • Each UltraServer contains 144 Trainium3 chips
  • Previewed Trainium4 (6x FP4 compute performance)

Why This Matters for Marvell: Marvell disclosed in August 2024 that revenue ramp on Trainium3 was a key driver of Q4 FY2025 and FY2026 custom silicon growth. The December 2025 production announcement validates Marvell’s guidance.

Primary Source: AWS re:Invent 2025 announcements, Trainium3 Deep Dive

Absence of Disclosure: Supplier Concentration Risk

What Amazon Does NOT Disclose:

  • No Amazon 10-K filing explicitly names Marvell Technology as a supplier
  • No risk-factor language citing dependency on Marvell for Trainium or Nitro custom silicon
  • “Supplier concentration” risk factors mention TSMC (92% of advanced AI chips), SK Hynix (62% of HBM), but do not name custom ASIC design partners

Implication: Marvell’s $1.5B custom silicon revenue claim in FY2026 relies on a 5-year AWS contract that hyperscaler customers cannot verify from public filings. Amazon’s disclosure strategy treats custom silicon design partnerships as internal operational detail, not material risk.

Confidence: ◐ Medium — Contractual existence confirmed; Amazon’s silence on supplier dependency suggests low perceived switching cost or reluctance to publicize custom-chip vulnerability.

2. Microsoft (MSFT)

Maia 200 Custom Inference Accelerator (January 2026)

Public Announcement:

  • Maia 200 built on TSMC 3nm process
  • 216GB HBM3e at 7 TB/s
  • Deployed in US Central and US West 3 datacenters
  • Claimed 30% better performance-per-dollar vs. latest-gen hardware
  • Running GPT-5.2 models from OpenAI

Primary Source: Microsoft Maia 200 Blog

Hedged Language on Custom Silicon Partners

Satya Nadella, CEO (Q2 FY2026 Earnings):

“We’ve been building our own silicon for a long time… the performance we’re able to get in the gems at SP4 just proves the point that when you have a new workload, a new shape of a workload, you can start innovating end to end between the model and the silicon.”

Microsoft discloses TSMC as the manufacturing partner for Maia silicon, but does not publicly name the design partner (whether Broadcom, Marvell, or in-house Nuvia/ARM).

Known Suppliers (Industry Intelligence):

  • Graviton CPU: Developed in-house (acquired Annapurna Labs 2015)
  • Maia 100 inference: Originally rumored as partnership with Broadcom or external design partner; Maia 200 specifics not disclosed

Absence of Disclosure: Design Partner Identity

What Microsoft Does NOT Disclose:

  • No 10-K or 10-Q risk factor naming Marvell, Broadcom, or any custom ASIC design partner
  • No earnings call commentary on whether Maia is 100% in-house or involves design partnerships
  • Maia 200 PR released through Microsoft blog (not investor relations), suggesting business-unit announcement rather than material disclosure

Implication: Microsoft’s Maia program may include external silicon IP or co-design partnerships (possible Marvell involvement); public statements emphasize in-house control and TSMC relationship. The absence of design-partner disclosure suggests either (a) Microsoft prefers not to namecheck design IP providers, or (b) Maia 200 was developed largely in-house.

Confidence: ◐ Medium — TSMC confirmed; design partner identity unconfirmed; no Marvell contradiction found.

3. Google / Alphabet (GOOGL)

Marvell Confirmed as 3rd TPU Design Partner (April 2026)

Google Cloud Next 2026 Announcement: Google is co-developing two new AI inference chips with Marvell:

  1. Memory Processing Unit (MPU) — to improve memory bandwidth for TPU inference
  2. New Inference-Optimized TPU — complementary to Broadcom (training) and MediaTek (cost-optimized inference) designs

TPU v8 Supply Chain Consolidation:

  • TPU v8t (Sunfish): Training accelerator, designed with Broadcom
  • TPU v8i (Zebrafish): Inference accelerator, designed with MediaTek
  • New MPU + Inference TPU: Designed with Marvell Technology
  • Manufacturing: TSMC 2nm (late 2027 target)

CEO Sundar Pichai Context: Google’s deliberate multi-sourcing (“optionality into a supply chain where dependence on any single partner creates pricing risk, capacity risk, and strategic vulnerability”).

Primary Source: Google Cloud Next 2026 TPU announcements, Marvell stock surge on Google partnership

Historical Absence: Marvell Not Named in TPU v1-v7 Disclosures

Prior to April 2026:

  • All TPU generations (v1-v7) attributed to Google internal teams or Broadcom exclusive design partnership
  • No Marvell mention in Google Cloud Next 2024, Google IO 2024, or investor disclosures
  • Broadcom co-design long-standing; Marvell entry disrupts Broadcom’s perceived TPU monopoly

Implication: Marvell’s April 2026 announcement represents a major win for its custom silicon division and a deliberate second-source strategy by Google to reduce Broadcom dependency. The absence of Marvell in prior TPU cycles is significant — it shows Broadcom held exclusive or primary relationship for 6+ years.

Confidence: ✓ High — Confirmed directly by Google Cloud Next 2026; multiple primary sources.

4. Meta Platforms (META)

Marvell Collaboration on MTIA Arke Inference Chip (October 2024)

Disclosed Collaboration: In October 2024, Marvell and Meta announced a design collaboration for custom accelerators. Meta’s MTIA Arke variant is an inference-only chip developed with Marvell Technology.

MTIA Lineage:

  • MTIA (Meta Training and Inference Accelerator): Earlier generations co-developed with Broadcom
  • MTIA Arke: Inference-specialized sub-variant, Marvell co-design
  • MTIA Iris: Next-generation rollout planned for 2026

Primary Source: Meta MTIA custom chip strategy

OCP (Open Compute Project) 2025: Marvell in ESUN Workgroup

Ethernet for Scale-Up Networking (ESUN) Initiative (October 2025): Meta is a founding participant in ESUN alongside Marvell, AMD, Arista, Broadcom, Cisco, HPE, Microsoft, NVIDIA, OpenAI, Oracle.

ESUN Scope: Open, standards-based Ethernet switching and framing for scale-up networking (switches, not custom accelerators).

Implication: ESUN groups Marvell with hyperscalers and competitors in a working group; not a bilateral custom-silicon contract. Marvell’s optical switching and interconnect IP would be relevant to ESUN’s framing specifications.

Primary Source: OCP Summit 2025: Meta advances open network fabrics

Absence of Disclosure: MTIA Design Partner in Meta 10-K

What Meta Does NOT Disclose:

  • No Meta 10-K filing names Broadcom or Marvell as MTIA design partners
  • MTIA is described in investor disclosures as “Meta-developed” custom accelerator; partnership detail is omitted
  • Open Compute Project participation is non-exclusive; does not imply bilateral custom-chip contracts

Implication: Meta treats custom silicon design partnerships as proprietary internal detail. The October 2024 Marvell announcement was a joint PR, not a Meta investor disclosure. Meta’s silence suggests either (a) desire to maintain supplier optionality, or (b) intent to keep design partnerships confidential.

Confidence: ◐ Medium — Marvell design collaboration confirmed via Marvell PR; Meta’s own filings are silent.

5. Oracle (ORCL)

OCI Gen2 Capex Surge; No Named Semiconductor Supplier

Oracle Cloud Infrastructure Gen2 Strategy (2024-2026):

  • Oracle doubled cloud capex in FY2026 H1 (December 2024 earnings)
  • OCI Gen2 emphasizes NVIDIA Blackwell GPUs, AMD MI300X GPUs
  • No public disclosure of custom switching, interconnect, or ASIC supplier for OCI Gen2

Available Information:

  • OCI provides bare-metal instances with NVIDIA, AMD GPUs
  • No mention of custom Ethernet switching, CPO, or optical DSP suppliers
  • No Marvell naming in OCI Gen2 announcements, Oracle Cloud Next 2024-2025, or earnings calls

Primary Source: Oracle Q2 FY2026 earnings

Historical Marvell-Oracle Relationship

Oracle-Marvell Security Collaboration (July 2022): Joint press release on OCI Key Management Service integration with Marvell security features. This pre-dates OCI Gen2 capex ramp and does not constitute active silicon supply agreement.

Assessment: Complete Absence of Disclosure

Confidence: ⚠ Low — No evidence of Marvell involvement in OCI Gen2. Either:

  1. Oracle sources switching/optical interconnect from Broadcom, NVIDIA (Spectrum-X), or proprietary design
  2. Marvell supply relationship exists but is not disclosed (possible but undocumented)
  3. Oracle outsources infrastructure to hyperscaler partners (e.g., AWS, Google Cloud) and does not operate proprietary custom silicon

Synthesis: Confidence Levels & Disclosure Gaps

HyperscalerKnown Design WinPublic Disclosure DepthRisk of Overstatement
Amazon✓ Trainium (Marvell known)✓ High (5-yr contract)Low — contract validated by both parties
Microsoft? Maia (design partner unconfirmed)◐ Medium (TSMC only)Medium — Maia partner identity public-market speculation
Google✓ TPU MPU/Inference (confirmed April 2026)✓ High (official announcement)Low — recent announcement, multiple primary sources
Meta✓ MTIA Arke (Marvell design collab)◐ Medium (via Marvell PR only)Medium — no Meta investor disclosure; MTIA Iris (2026) design partner TBD
Oracle⚠ Unknown⚠ NoneHigh — no disclosure; possible non-existent relationship

Key Findings

  1. Marvell’s disclosed $1.5B custom silicon FY2026 revenue has strong corroboration from:

    • AWS: Trainium3 (confirmed in production, Dec 2025)
    • Google: New TPU MPU + inference chip (confirmed April 2026)
    • Meta: MTIA Arke (confirmed October 2024)

  2. Absence of disclosure is material: Microsoft (Maia design partner), Meta (MTIA in 10-K), and Oracle (OCI Gen2 supplier) do not name Marvell in regulatory filings. This asymmetry suggests:

    • Hyperscalers treat design partnerships as operational secrets
    • Marvell’s $1.5B claim may rely on 1-2 large wins (Amazon, Google) with less corroboration from Microsoft/Meta/Oracle

  3. Amazon’s disclosure strategy is unique: AWS publicly discusses Trainium and Marvell partnership; other hyperscalers avoid naming design partners in investor communications.

  4. Confidence summary: High confidence in AWS + Google + Meta Marvell relationships; medium confidence in Microsoft Maia origin; low confidence in Oracle OCI Gen2 involvement.

Sources Cited

Cross-references